It is common to use a CMOS (Complementary Metal Oxide Semiconductor) inverter, such as that shown in FIG. 1, as a TTL (Transistor-Transistor Logic) input buffer. In the general case, if both transistors in FIG. 1a are sized correctly, the voltage characteristic of the inverter resembles that shown in FIG. 2. The switching point is halfway between zero and V.sub.DD, namely, at V.sub.DD /2.
If V.sub.DD changes (for example, from 5 volts to 10 volts), the switching point also changes, because the voltage characteristic changes, as indicated approximately by the phantom line 4. After the change, the switching point remains at the halfway point, at V.sub.DD /2, but its absolute value changes, from 2.5 volts to 5 volts in this example.
This change in absolute value can cause a problem when the inverter of FIG. 1a is used as an input buffer for TTL levels. For TTL levels, the transistors are constructed so that the switching point is at 1.4 volts when V.sub.DD equals 5 volts. If V.sub.DD changes, the switching point changes, as illustrated in FIG. 2. For small changes in V.sub.DD, the switching point remains close enough to 1.4 volts to be satisfactory. But if V.sub.DD changes by a large amount, such as from 5 to 10 volts as in the example above, the switching point deviates significantly from the normal TTL switching point of 1.4 volts.
Therefore, the switching point of this type of buffer is not independent of supply voltage.